The minimum feature sizes of integrated circuits are continuously decreasing in order to increase the packing density of the various semiconductor devices formed thereby. With this size reduction, however, various steps within the integrated circuit fabrication process become more difficult. One such area within the semiconductor fabricating process which experiences unique challenges as feature sizes shrink is photolithography.
Photolithography involves selectively exposing regions of a resist-coated silicon wafer to form a radiation pattern thereon. Once exposure is complete, the exposed resist is developed in order to selectively expose and protect the various regions on the silicon wafer defined by the exposure pattern (e.g., silicon regions in the substrate, polysilicon on the substrate, or insulating layers such as silicon dioxide).
An integral component of a photolithography or pattern transfer system is a reticle (often called a mask) which includes a pattern thereon corresponding to features to be formed in a layer on the substrate. A reticle typically includes a transparent glass plate covered with a patterned light blocking material such as chrome. The reticle is placed between a radiation source producing radiation of a pre-selected wavelength (e.g., ultraviolet light) and a focusing lens which may form part of a stepper apparatus. Placed beneath the stepper is the resist-covered silicon wafer. When the radiation from the radiation source is directed onto the reticle, light passes through the glass (in the regions not containing the chrome mask patterns) and projects onto the resist-covered silicon wafer. In this manner, an image of the reticle is transferred to the resist.
The resist (sometimes referred to as the "photoresist") is provided as a thin layer of radiation-sensitive material that is typically spin-coated over the entire silicon wafer surface. The resist material is classified as either positive or negative depending on how it responds to the light radiation. Positive resist, when exposed to radiation becomes more soluble and is thus more easily removed in a development process. As a result, a developed positive resist contains a resist pattern corresponding to the dark regions on the reticle. Negative resist, in contrast, becomes less soluble when exposed to radiation. Consequently, a developed negative resist contains a pattern corresponding to the transparent regions of the reticle. For simplicity, the following discussion will describe only positive resists, but it should be understood that negative resists may be substituted therefor.
An exemplary prior art reticle is illustrated in FIG. 1. Prior art FIG. 1 includes a reticle 10 corresponding to a desired integrated circuit pattern 12. For simplicity, the pattern 12 consists of only two design mask patterns. A clear reticle glass 14 allows radiation to project onto a resist covered silicon wafer. The chrome regions 16 and 18 on the reticle 10 block radiation to generate an image on the wafer corresponding to the desired integrated circuit design features.
As light passes through the reticle 10, it is refracted and scattered by the edges of the chrome 16 and 18. This causes the projected image to exhibit some rounding and other optical distortion. While such effects pose relatively little difficulty in layouts with large features (e.g., features with critical dimensions greater than one micron), they can not be ignored in present day circuit layouts where critical dimensions are about 0.25 micron or smaller. The problem highlighted above becomes even more pronounced in integrated circuit designs having feature sizes near the wavelength of the radiation used in the photolithographic process.
Prior art FIG. 2 illustrates the impact of the diffraction and scattering caused by the radiation passing through the reticle 10 and onto a section of a photoresist covered silicon substrate 20. As illustrated, the illumination pattern on the substrate 20 contains an illuminated region 22 and two dark regions 24 and 26 corresponding to the chrome regions 16 and 18 on the reticle 10. The illuminated pattern 22, however, exhibits considerable distortion, with the dark regions 24 and 26 having their comers 28 rounded. Unfortunately, any distorted illumination pattern propagates through the developed resist pattern and negatively impacts the integrated circuit features such as polysilicon gate regions, vias in dielectrics, etc. As a result, the integrated circuit performance is degraded.
To remedy this problem, a reticle correction technique known as optical proximity correction (OPC) has been developed. OPC involves the adding of dark regions to and/or the subtracting of dark regions from portions of a reticle to overcome the distorting effects of diffraction and scattering. Typically, OPC is performed on a digital representation of a desired integrated circuit pattern. This digital representation is often referred to as the mask layout data and is used by the reticle manufacturer to generate the reticle. First, the mask layout data is evaluated with software to identify regions where optical distortion will result. Then the OPC is applied to compensate for the distortion. The resulting pattern is ultimately transferred to the reticle glass.
Prior art FIG. 3 illustrates how OPC may be employed to modify the reticle design illustrated in FIG. 1 and thereby provide more accurately the desired illumination pattern at the substrate. As shown, an OPC-corrected reticle 30 includes two features 32 and 34 outlined in chrome on the glass plate 36. Various corrections 38 have been added to the base features. Some correction takes the form of "serifs." Serifs are typically small, appendage-type addition or subtraction regions typically made at corner regions or other areas on reticle designs.
Prior art FIG. 4 illustrates an illumination pattern 50 produced on a photoresist covered wafer surface 52 by radiation passing through the reticle 30 of prior art FIG. 3. As shown, the illuminated region includes a light region 54 surrounding a set of dark regions 56 and 58 which substantially faithfully represent the desired pattern illustrated in prior art FIG. 1. Note that the illumination pattern 22 of prior art FIG. 2 which was not produced with a reticle having OPC (reticle 10) has been improved greatly by the reticle 30 having OPC.
Although OPC designs provide performance improvements over features which do not employ OPC as illustrated in prior art FIGS. 1-4, presently there is not a usable method for determining whether one type of OPC design is better than another. That is, it is difficult to determine which OPC design is the optimal design for a given feature even with the most advanced simulation equipment. As illustrated in prior art FIG. 5, a feature 60 on a mask 62 has a core portion 64 with an OPC design 66 applied thereto. The OPC design 66, however, may include different types of serifs 68a, 68b of various dimensions at various locations about the feature 60. For example, the serif 68a may attach to the core portion 64 at various points and thus may vary substantially in its dimensions. In addition, the serif 68b may have a variable width, a variable length, and may exist at various distances away from the core portion 64. Presently, however, there is not an efficient way of evaluating whether one type of OPC design is better than another in achieving its goal, namely to produce a feature on a substrate which substantially approximates an ideal feature 70, as illustrated in prior art FIG. 6.
One prior art method for evaluating multiple OPC designs involves forming a mask having multiple mask patterns thereon, wherein each mask pattern includes the core portion and a unique OPC design. The mask is then used in a pattern transfer system to generate a plurality of features on a substrate. The plurality of generated features are then individually analyzed to see which OPC design provided a feature which most closely approximated the intended ideal feature. This prior art method, however, is undesirable because it involves a time-consuming and expensive evaluation process. For example, a test mask must be generated and features must be formed on a substrate using a pattern transfer system according to conventional techniques. Then, each generated feature must be individually measured at numerous points and compared according to a set of criteria to determine which is the best OPC design. Clearly such a process is disadvantageously expensive and time-consuming. In addition, such an evaluation process is only valid for the one particular feature of interest; additional such evaluations would be necessary in order to evaluate different features. Lastly, the OPC design evaluation process is only valid for the particular pattern transfer system which was used in the evaluation. Therefore the replacement or modification of the pattern transfer system would render the earlier OPC design evaluation of doubtful value and another OPC design evaluation process would most likely be required to ensure that the optimal OPC design will be employed for a given feature.
Another problem associated with the implementation of OPC designs for a given feature is the mask fabrication process which is employed in fabricating the mask. As illustrated in prior art FIG. 7, a portion of mask layout data associated with a core feature 80 having an OPC design 82 is used to generate a pattern on a mask (i.e., a mask pattern). As illustrated in prior art FIG. 7, different mask fabrication processes for a given feature result in mask patterns that approximate the intended feature having the OPC, but nevertheless differ from one another. For example, the mask pattern 86 formed by the mask fabrication process A of prior art FIG. 7 may have been generated using a dry etch while the mask pattern 88 formed by the mask fabrication process B may have been generated using a wet etch which caused the mask patterns 86 and 88 to differ. Given the fact that different mask fabrication processes provide mask patterns which approximate the intended OPC design, but differ from one another, one must evaluate which mask fabrication process is the optimal process to utilize in order to maximize the benefits provided by OPC.
It is an object of the present invention to further improve upon the prior art OPC development techniques and mask fabrication techniques presently being employed.